Menu open close

Sony LSI Design Inc.

System Level Design and Verification Methodology

We contribute to logic design with a leading-edge system-level design and verification flow.

Technical Summaries and Features

We apply leading-edge system-level design and verification methodology to provide an image processing circuit development flow that realizes high quality with super-short TAT.
Our development flow combines elements such as a image quality assessment environment based on SystemC, behaviral synthesis technology, functional verification based on formal technology, assertion-based verification and clock-domain crossing verification technology.

Design Record

Image Sensor, Camera SoC, TV SoC and Other High-quality Circuits

Page Top