1.Features
| This IP is a Fully integrated PLL cell with internal loop filter. |
| This IP is silicon-proven cell at 0.18um process. |
| - Output Frequency Range |
: 10MHz ∼ 200MHz |
| - Input Frequency Range |
: 1MHz ∼ 50MHz |
| - Compared Frequency Range |
: 1MHz ∼ 50MHz |
| - Power Consumption |
: 10mW (@3.3V,200MHz Output) |
| - 3.3V Power Supply (Digital Input Output 1.8V) |
2.Recommended Operating Conditions
| Parameter |
Symbol |
Min. |
Typ. |
Max. |
Unit |
| Power Supply Voltage |
VAVD |
3.0 |
3.3 |
3.6 |
V |
| VDVD |
1.65 |
1.8 |
1.95 |
V |
| Junction Temperature |
Tj |
-20 |
25 |
105 |
ºC |
3.Electrical Characteristics
(VAVD=3.3V, VDVD=1.8V, Fin=27MHz, FREF=27MHz, Fout=216MHz, Ta=25ºC, unless otherwise noted.)
| Parameter |
Symbol |
Conditions |
Min. |
Typ. |
Max. |
Unit |
| Power Supply Current |
IAVD |
OSCOUT=216MHz |
- |
3 |
- |
mA |
| IDVD |
- |
- |
0.1 |
- |
| Input Frequency |
Fin |
- |
1 |
- |
50 |
MHz |
| Compared Frequency |
FREF |
- |
1 |
- |
50 |
MHz |
| Output Frequency |
Fout |
- |
10 |
- |
200 |
MHz |
| Tracking Jitter |
Ttj |
- |
- |
- |
500 |
ps |
| Period Jitter |
Tpj |
- |
- |
- |
1000 |
ps |
| Phase Difference from Input to Output |
Tph |
- |
-10 |
- |
10 |
ns |
| Output Duty Ratio |
Duty |
- |
45 |
50 |
55 |
% |
| Lock in Time |
Tlck |
- |
- |
0.2 |
0.5 |
ms |